About Us News Contact Us
CPLD FPGA MCU-SoC SoC AG32VA101-ASIC SoC AG32VA401-ASIC MCU AG32VF103 Series MCU AG32VF107 Series MCU AG32VF205 Series MCU AG32VF303 Series MCU AG32VF407 Series
FAQ Sales support Sales distributors
Software download


nifedipine grossesse

nifedipine topique redirect acheter nifedipine 30mg

weed lexapro withdrawal

lexapro weed effects click here lexapro and weed effects

buy abortion pill

buy abortion pill dearteaga.es

abortion pill

buy cheap abortion pill


champix onderdewatertoren.nl


dulcolax website


prometrium recursosred.es


inderal informedu.com.au

cheap abortion clinics in detroit mi

cheap abortion clinics in detroit mi viaggiatoritalianiassociati.com

benadryl and pregnancy first trimester

benadryl and pregnancy cleft palate

sertraline 50mg side effects

sertraline 50mg avvocatoventura.it

am i pregnant or just fat quiz

am i pregnant quiz nhs myufdoctor.org

lamictal pregnancy autism

lamictal pregnancy

bentelan effetti collaterali

bentelan a cosa serve read

compare naloxone and naltrexone

naltrexone and naloxone pietschsoft.com


prednisolone go

pregabalin 300 mg


tadalafil generico costo

cialis generico in farmacia senza ricetta open


naltrexone low dose

abortion pill online pharmacy

abortion pill online pharmacy redirect

buy abortion pill online uk

abortion pill online review online

sertraline alcohol craving

sertraline and alcohol use

cialis generico online italia consegna veloce

cialis generico


FPGA+MCU SoC family device, integrates high performance FPGA logic with low-power MCU core in a single die one silicon, targets consumer and industrial's mass-volume market with low-cost and high-performance SoC. The device features integrated rich functions with up to 10K LUTs and MCU core with 120Mhz.


MCU hard-IP is embedded within FPGA logic fabric, and all mcu internal IOs are connectable to device's IO pad, and internal FPGA's logic as user demands. Cortex MCU, with usable code space up to  64 KByte RAM, is programmable through spiflash, and JTAG for testing purposes.  Additionally,



  • High-density architecture with 10K LEs
  • M9K embedded memory blocks, up to 414Kbits of RAM space
  • Up to 23 18 x 18-bit embedded multipliers are each configurable as two independent 9 x 9-bit multipliers
  • Provides 2 PLLs per device provide clock multiplication and phase shifting
  • High-speed differential I/O standard support, including LVDS, RSDS, mini-LVDS, LVPECL
  • Single-ended I/O standard support, including 3.3V, 2.5V, 1.8V, and 1.5V LVCMOS and LVTTL
  • General package options, LQFP-144, -176 and FBGA-256
  • Flexible device configuration through JTAG and SPI interface
  • Support remote update, by "dual-boot" like implementation


Packaging types include BGA256, and QFP144.


Download Datasheet

EVB Schematics

Copyright © 2019 AGM Micro 沪ICP备15031687号